diff options
| author |   Athira Rajeev <atrajeev@linux.vnet.ibm.com> | 2020-07-17 10:38:13 -0400 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2020-07-22 00:03:17 +1000 |
| commit | 78d76819e6f04672989506e7792895a51438516e (patch) | |
| tree | 65f3748b8a8a6cd1ff6f07287eb8f74fa17f9c68 /arch/powerpc/include/asm/perf_event_server.h | |
| parent | powerpc/perf: Fix missing is_sier_aviable() during build (diff) | |
| download | wireguard-linux-78d76819e6f04672989506e7792895a51438516e.tar.xz wireguard-linux-78d76819e6f04672989506e7792895a51438516e.zip | |
powerpc/perf: Update cpu_hw_event to use `struct` for storing MMCR registers
core-book3s currently uses array to store the MMCR registers as part
of per-cpu `cpu_hw_events`. This patch does a clean up to use `struct`
to store mmcr regs instead of array. This will make code easier to read
and reduces chance of any subtle bug that may come in the future, say
when new registers are added. Patch updates all relevant code that was
using MMCR array ( cpuhw->mmcr[x]) to use newly introduced `struct`.
This includes the PMU driver code for supported platforms (power5
to power9) and ISA macros for counter support functions.
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/1594996707-3727-2-git-send-email-atrajeev@linux.vnet.ibm.com
Diffstat (limited to 'arch/powerpc/include/asm/perf_event_server.h')
| -rw-r--r-- | arch/powerpc/include/asm/perf_event_server.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h index 3e9703f44c7c..f9a36680339d 100644 --- a/arch/powerpc/include/asm/perf_event_server.h +++ b/arch/powerpc/include/asm/perf_event_server.h @@ -17,6 +17,12 @@ struct perf_event; +struct mmcr_regs { + unsigned long mmcr0; + unsigned long mmcr1; + unsigned long mmcr2; + unsigned long mmcra; +}; /* * This struct provides the constants and functions needed to * describe the PMU on a particular POWER-family CPU. @@ -28,7 +34,7 @@ struct power_pmu { unsigned long add_fields; unsigned long test_adder; int (*compute_mmcr)(u64 events[], int n_ev, - unsigned int hwc[], unsigned long mmcr[], + unsigned int hwc[], struct mmcr_regs *mmcr, struct perf_event *pevents[]); int (*get_constraint)(u64 event_id, unsigned long *mskp, unsigned long *valp); @@ -41,7 +47,7 @@ struct power_pmu { unsigned long group_constraint_val; u64 (*bhrb_filter_map)(u64 branch_sample_type); void (*config_bhrb)(u64 pmu_bhrb_filter); - void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); + void (*disable_pmc)(unsigned int pmc, struct mmcr_regs *mmcr); int (*limited_pmc_event)(u64 event_id); u32 flags; const struct attribute_group **attr_groups; |