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authorMihai Caraman <mihai.caraman@freescale.com>2012-06-25 02:26:19 +0000
committerAlexander Graf <agraf@suse.de>2012-07-11 17:39:37 +0200
commitc7ba7771c3dd01183d3155640129ec7c9707f082 (patch)
tree06016503d9a838dc6c5832fa0194df24085bc7af /arch/powerpc/kvm/e500mc.c
parentKVM: PPC: bookehv: Add ESR flag to Data Storage Interrupt (diff)
downloadwireguard-linux-c7ba7771c3dd01183d3155640129ec7c9707f082.tar.xz
wireguard-linux-c7ba7771c3dd01183d3155640129ec7c9707f082.zip
KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
64-bit host needs to remain in 64-bit mode when an exception take place. Set interrupt computaion mode in EPCR register. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'arch/powerpc/kvm/e500mc.c')
-rw-r--r--arch/powerpc/kvm/e500mc.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index fe6c1de6b701..db97ee3a0827 100644
--- a/arch/powerpc/kvm/e500mc.c
+++ b/arch/powerpc/kvm/e500mc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2010 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
*
* Author: Varun Sethi, <varun.sethi@freescale.com>
*
@@ -183,6 +183,9 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
SPRN_EPCR_DUVD;
+#ifdef CONFIG_64BIT
+ vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
+#endif
vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_DEP | MSRP_PMMP;
vcpu->arch.eplc = EPC_EGS | (vcpu->kvm->arch.lpid << EPC_ELPID_SHIFT);
vcpu->arch.epsc = vcpu->arch.eplc;