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authorMichael Neuling <mikey@neuling.org>2017-03-24 21:20:56 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2017-03-28 10:52:03 +1100
commit517c27570cf38f182e7a688d50a9b978333f8ea8 (patch)
treed25bc3ab29f42b018b0662563e54754271e9f603 /arch/powerpc/platforms/powernv/opal-xscom.c
parentpowerpc/powernv: de-deuplicate OPAL call wrappers (diff)
downloadwireguard-linux-517c27570cf38f182e7a688d50a9b978333f8ea8.tar.xz
wireguard-linux-517c27570cf38f182e7a688d50a9b978333f8ea8.zip
powerpc/powernv: Fix XSCOM address mangling for form 1 indirect
POWER9 adds form 1 scoms. The form of the indirection is specified in the top nibble of the scom address. Currently we do some (ugly) bit mangling so that we can fit a 64 bit scom address into the debugfs interface. The current code only shifts the top bit (indirect bit). This patch changes it to shift the whole top nibble so that the form of the indirection is also shifted. This patch is backwards compatible with older scoms. (This change isn't required in the arch/powerpc/platforms/powernv/opal-prd.c scom interface as it passes the whole 64bit scom address without any bit mangling) Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/platforms/powernv/opal-xscom.c')
-rw-r--r--arch/powerpc/platforms/powernv/opal-xscom.c27
1 files changed, 17 insertions, 10 deletions
diff --git a/arch/powerpc/platforms/powernv/opal-xscom.c b/arch/powerpc/platforms/powernv/opal-xscom.c
index d0ac535cf5d7..28651fb25417 100644
--- a/arch/powerpc/platforms/powernv/opal-xscom.c
+++ b/arch/powerpc/platforms/powernv/opal-xscom.c
@@ -73,25 +73,32 @@ static int opal_xscom_err_xlate(int64_t rc)
static u64 opal_scom_unmangle(u64 addr)
{
+ u64 tmp;
+
/*
- * XSCOM indirect addresses have the top bit set. Additionally
- * the rest of the top 3 nibbles is always 0.
+ * XSCOM addresses use the top nibble to set indirect mode and
+ * its form. Bits 4-11 are always 0.
*
* Because the debugfs interface uses signed offsets and shifts
* the address left by 3, we basically cannot use the top 4 bits
* of the 64-bit address, and thus cannot use the indirect bit.
*
- * To deal with that, we support the indirect bit being in bit
- * 4 (IBM notation) instead of bit 0 in this API, we do the
- * conversion here. To leave room for further xscom address
- * expansion, we only clear out the top byte
+ * To deal with that, we support the indirect bits being in
+ * bits 4-7 (IBM notation) instead of bit 0-3 in this API, we
+ * do the conversion here.
*
- * For in-kernel use, we also support the real indirect bit, so
- * we test for any of the top 5 bits
+ * For in-kernel use, we don't need to do this mangling. In
+ * kernel won't have bits 4-7 set.
*
+ * So:
+ * debugfs will always set 0-3 = 0 and clear 4-7
+ * kernel will always clear 0-3 = 0 and set 4-7
*/
- if (addr & (0x1full << 59))
- addr = (addr & ~(0xffull << 56)) | (1ull << 63);
+ tmp = addr;
+ tmp &= 0x0f00000000000000;
+ addr &= 0xf0ffffffffffffff;
+ addr |= tmp << 4;
+
return addr;
}