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| author |   Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 14:50:03 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2009-03-23 21:20:20 +0100 |
| commit | 80c5520811d3805adcb15c570ea5e2d489fa5d0b (patch) | |
| tree | ae797a7f4af39f80e77526533d06ac23b439f0ab /arch/x86/include/asm/msr-index.h | |
| parent | Merge branches 'irq/sparseirq' and 'linus' into irq/core (diff) | |
| parent | cpumask: remove cpumask allocation from idle_balance, fix (diff) | |
| download | wireguard-linux-80c5520811d3805adcb15c570ea5e2d489fa5d0b.tar.xz wireguard-linux-80c5520811d3805adcb15c570ea5e2d489fa5d0b.zip | |
Merge branch 'cpus4096' into irq/threaded
Conflicts:
arch/parisc/kernel/irq.c
kernel/irq/handle.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/msr-index.h')
| -rw-r--r-- | arch/x86/include/asm/msr-index.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 358acc59ae04..2dbd2314139e 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -77,6 +77,11 @@ #define MSR_IA32_MC0_ADDR 0x00000402 #define MSR_IA32_MC0_MISC 0x00000403 +/* These are consecutive and not in the normal 4er MCE bank block */ +#define MSR_IA32_MC0_CTL2 0x00000280 +#define CMCI_EN (1ULL << 30) +#define CMCI_THRESHOLD_MASK 0xffffULL + #define MSR_P6_PERFCTR0 0x000000c1 #define MSR_P6_PERFCTR1 0x000000c2 #define MSR_P6_EVNTSEL0 0x00000186 |