diff options
| author |   Peter Zijlstra <a.p.zijlstra@chello.nl> | 2010-02-01 15:36:30 +0100 |
|---|---|---|
| committer |   Ingo Molnar <mingo@elte.hu> | 2010-03-02 15:06:47 +0100 |
| commit | b622d644c7d61a5cb95b74e7b143c263bed21f0a (patch) | |
| tree | 3d9e1b5eb8464c29664d4744abff9c51e2500222 /arch/x86/include/asm/perf_event.h | |
| parent | perf, x86: Restrict the ANY flag (diff) | |
| download | wireguard-linux-b622d644c7d61a5cb95b74e7b143c263bed21f0a.tar.xz wireguard-linux-b622d644c7d61a5cb95b74e7b143c263bed21f0a.zip | |
perf_events, x86: Fixup fixed counter constraints
Patch 1da53e0230 ("perf_events, x86: Improve x86 event scheduling")
lost us one of the fixed purpose counters and then ed8777fc13
("perf_events, x86: Fix event constraint masks") broke it even
further.
Widen the fixed event mask to event+umask and specify the full config
for each of the 3 fixed purpose counters. Then let the init code fill
out the placement for the GP regs based on the cpuid info.
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Stephane Eranian <eranian@google.com>
LKML-Reference: <new-submission>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 80e693684f18..db6109a885a7 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -50,7 +50,7 @@ INTEL_ARCH_INV_MASK| \ INTEL_ARCH_EDGE_MASK|\ INTEL_ARCH_UNIT_MASK|\ - INTEL_ARCH_EVTSEL_MASK) + INTEL_ARCH_EVENT_MASK) #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL 0x3c #define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8) |