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| author |   Ma Ke <make_ruc2021@163.com> | 2023-10-10 20:29:16 +0800 |
|---|---|---|
| committer |   Damien Le Moal <dlemoal@kernel.org> | 2023-10-11 17:51:53 +0900 |
| commit | 2267d5a146c8fe7fcad812aed93b44d4ae148789 (patch) | |
| tree | 300272b9667d1c5044a3c70f97e4357c08e2c351 /drivers/ata | |
| parent | ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list (diff) | |
| download | wireguard-linux-2267d5a146c8fe7fcad812aed93b44d4ae148789.tar.xz wireguard-linux-2267d5a146c8fe7fcad812aed93b44d4ae148789.zip | |
ata: sata_mv: aspeed: fix value check in mv_platform_probe()
In mv_platform_probe(), check the return value of clk_prepare_enable()
and return the error code if clk_prepare_enable() returns an
unexpected value.
Signed-off-by: Ma Ke <make_ruc2021@163.com>
Reviewed-by: Niklas Cassel <niklas.cassel@wdc.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
Diffstat (limited to 'drivers/ata')
| -rw-r--r-- | drivers/ata/sata_mv.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c index 45e48d653c60..e82786c63fbd 100644 --- a/drivers/ata/sata_mv.c +++ b/drivers/ata/sata_mv.c @@ -4123,10 +4123,13 @@ static int mv_platform_probe(struct platform_device *pdev) hpriv->base -= SATAHC0_REG_BASE; hpriv->clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(hpriv->clk)) + if (IS_ERR(hpriv->clk)) { dev_notice(&pdev->dev, "cannot get optional clkdev\n"); - else - clk_prepare_enable(hpriv->clk); + } else { + rc = clk_prepare_enable(hpriv->clk); + if (rc) + goto err; + } for (port = 0; port < n_ports; port++) { char port_number[16]; |