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| author |   Alexandre Belloni <alexandre.belloni@bootlin.com> | 2019-04-02 14:50:54 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2019-04-25 12:34:06 -0700 |
| commit | a436c2a447e59740e8bc5c604abac33419099673 (patch) | |
| tree | dcbabdd4516f54caeb5bd438a3b3c6c1459fa215 /drivers/clk/at91/Makefile | |
| parent | clk: at91: master: Add sam9x60 support (diff) | |
| download | wireguard-linux-a436c2a447e59740e8bc5c604abac33419099673.tar.xz wireguard-linux-a436c2a447e59740e8bc5c604abac33419099673.zip | |
clk: at91: add sam9x60 PLL driver
The PLLs on the sam9x60 (PLLA and USB PLL) use a different register set and
programming model than the previous SoCs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/Makefile')
| -rw-r--r-- | drivers/clk/at91/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index c75df1cad60e..0a30fc8dfcb0 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o obj-$(CONFIG_HAVE_AT91_H32MX) += clk-h32mx.o obj-$(CONFIG_HAVE_AT91_GENERATED_CLK) += clk-generated.o obj-$(CONFIG_HAVE_AT91_I2S_MUX_CLK) += clk-i2s-mux.o +obj-$(CONFIG_HAVE_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9260.o at91sam9rl.o at91sam9x5.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o obj-$(CONFIG_SOC_SAMA5D2) += sama5d2.o |