diff options
| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2020-07-22 10:38:19 +0300 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2020-07-24 02:19:08 -0700 |
| commit | 22a1dfe93bf496d03cb1d76b1fbd23a7ff4a062c (patch) | |
| tree | fe31d07e2593dcc5f7c90af7bc263cfbfa1e7861 /drivers/clk/at91/pmc.h | |
| parent | clk: at91: clk-generated: pass the id of changeable parent at registration (diff) | |
| download | wireguard-linux-22a1dfe93bf496d03cb1d76b1fbd23a7ff4a062c.tar.xz wireguard-linux-22a1dfe93bf496d03cb1d76b1fbd23a7ff4a062c.zip | |
clk: at91: clk-generated: add mux_table option
Add mux table option. This is necessary for IP versions that has
gaps in the range of available clock sources (e.g. SAMA7G5).
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/1595403506-8209-12-git-send-email-claudiu.beznea@microchip.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/at91/pmc.h')
| -rw-r--r-- | drivers/clk/at91/pmc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 949b1a7b91e5..2bfe1405f9f8 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -122,7 +122,7 @@ struct clk_hw * __init at91_clk_register_generated(struct regmap *regmap, spinlock_t *lock, const struct clk_pcr_layout *layout, const char *name, const char **parent_names, - u8 num_parents, u8 id, + u32 *mux_table, u8 num_parents, u8 id, const struct clk_range *range, int chg_pid); struct clk_hw * __init |