diff options
| author |   Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-15 12:32:24 +0300 |
|---|---|---|
| committer | Claudiu Beznea <claudiu.beznea@microchip.com> | 2023-06-21 10:42:48 +0300 |
| commit | a673dae8c4ad9ee02a80617c6569ac66991c6c82 (patch) | |
| tree | 9c3242fa35cf527ac2ab65d46a37d18589009ee3 /drivers/clk/at91 | |
| parent | clk: at91: clk-utmi: add support for parent_hw (diff) | |
| download | wireguard-linux-a673dae8c4ad9ee02a80617c6569ac66991c6c82.tar.xz wireguard-linux-a673dae8c4ad9ee02a80617c6569ac66991c6c82.zip | |
clk: at91: clk-sam9x60-pll: add support for parent_hw
Add support for parent_hw in SAM9X60 PLL clock drivers.
With this parent-child relation is described with pointers rather
than strings making registration a bit faster.
All the SoC based drivers that rely on clk-sam9x60-pll were adapted
to the new API change. The switch itself for SoCs will be done
in subsequent patches.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230615093227.576102-9-claudiu.beznea@microchip.com
Diffstat (limited to 'drivers/clk/at91')
| -rw-r--r-- | drivers/clk/at91/clk-sam9x60-pll.c | 17 | ||||
| -rw-r--r-- | drivers/clk/at91/pmc.h | 3 | ||||
| -rw-r--r-- | drivers/clk/at91/sam9x60.c | 4 | ||||
| -rw-r--r-- | drivers/clk/at91/sama7g5.c | 2 |
4 files changed, 17 insertions, 9 deletions
diff --git a/drivers/clk/at91/clk-sam9x60-pll.c b/drivers/clk/at91/clk-sam9x60-pll.c index 0882ed01d5c2..ff65f7b916f0 100644 --- a/drivers/clk/at91/clk-sam9x60-pll.c +++ b/drivers/clk/at91/clk-sam9x60-pll.c @@ -616,7 +616,7 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, { struct sam9x60_frac *frac; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned long parent_rate, irqflags; unsigned int val; int ret; @@ -629,7 +629,10 @@ sam9x60_clk_register_frac_pll(struct regmap *regmap, spinlock_t *lock, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_name; + if (parent_name) + init.parent_names = &parent_name; + else + init.parent_hws = (const struct clk_hw **)&parent_hw; init.num_parents = 1; if (flags & CLK_SET_RATE_GATE) init.ops = &sam9x60_frac_pll_ops; @@ -692,14 +695,15 @@ free: struct clk_hw * __init sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, - const char *name, const char *parent_name, u8 id, + const char *name, const char *parent_name, + struct clk_hw *parent_hw, u8 id, const struct clk_pll_characteristics *characteristics, const struct clk_pll_layout *layout, u32 flags, u32 safe_div) { struct sam9x60_div *div; struct clk_hw *hw; - struct clk_init_data init; + struct clk_init_data init = {}; unsigned long irqflags; unsigned int val; int ret; @@ -716,7 +720,10 @@ sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_name; + if (parent_hw) + init.parent_hws = (const struct clk_hw **)&parent_hw; + else + init.parent_names = &parent_name; init.num_parents = 1; if (flags & CLK_SET_RATE_GATE) init.ops = &sam9x60_div_pll_ops; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 8e32be004843..0f52e80bcd49 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -220,7 +220,8 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name, struct clk_hw * __init sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, - const char *name, const char *parent_name, u8 id, + const char *name, const char *parent_name, + struct clk_hw *parent_hw, u8 id, const struct clk_pll_characteristics *characteristics, const struct clk_pll_layout *layout, u32 flags, u32 safe_div); diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c index 505827013b46..e309cbf3cb9a 100644 --- a/drivers/clk/at91/sam9x60.c +++ b/drivers/clk/at91/sam9x60.c @@ -246,7 +246,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "pllack_divck", - "pllack_fracck", 0, &plla_characteristics, + "pllack_fracck", NULL, 0, &plla_characteristics, &pll_div_layout, /* * This feeds CPU. It should not @@ -266,7 +266,7 @@ static void __init sam9x60_pmc_setup(struct device_node *np) goto err_free; hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, "upllck_divck", - "upllck_fracck", 1, &upll_characteristics, + "upllck_fracck", NULL, 1, &upll_characteristics, &pll_div_layout, CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE | diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c index 42f2f61cc6d1..3297e028c2c5 100644 --- a/drivers/clk/at91/sama7g5.c +++ b/drivers/clk/at91/sama7g5.c @@ -975,7 +975,7 @@ static void __init sama7g5_pmc_setup(struct device_node *np) case PLL_TYPE_DIV: hw = sam9x60_clk_register_div_pll(regmap, &pmc_pll_lock, sama7g5_plls[i][j].n, - sama7g5_plls[i][j].p, i, + sama7g5_plls[i][j].p, NULL, i, sama7g5_plls[i][j].c, sama7g5_plls[i][j].l, sama7g5_plls[i][j].f, |