diff options
| author |   Samuel Holland <samuel@sholland.org> | 2022-05-31 00:17:41 -0500 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-06-09 15:40:23 -0700 |
| commit | c33ed61249dc54e7cf2137c04462883560375b77 (patch) | |
| tree | 0c10ae424abe1b9410347caf288ae3f895739e05 /drivers/clk/clk-fixed-factor.c | |
| parent | Linux 5.19-rc1 (diff) | |
| download | wireguard-linux-c33ed61249dc54e7cf2137c04462883560375b77.tar.xz wireguard-linux-c33ed61249dc54e7cf2137c04462883560375b77.zip | |
clk: fixed: Remove Allwinner A10 special-case logic
This compatible is part of the legacy sunxi clock support, and has not
been used since commit 6b48644b1d29 ("ARM: gr8: Convert to CCU") in
October 2016. Since supporting this compatible adds some overhead to
generic clock code, let's clean it up.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Link: https://lore.kernel.org/r/20220531051742.43273-1-samuel@sholland.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-fixed-factor.c')
| -rw-r--r-- | drivers/clk/clk-fixed-factor.c | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index 54942d758ee6..e6b36247c16b 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -210,16 +210,10 @@ struct clk_hw *devm_clk_hw_register_fixed_factor(struct device *dev, EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor); #ifdef CONFIG_OF -static const struct of_device_id set_rate_parent_matches[] = { - { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" }, - { /* Sentinel */ }, -}; - static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node) { struct clk_hw *hw; const char *clk_name = node->name; - unsigned long flags = 0; u32 div, mult; int ret; @@ -237,11 +231,8 @@ static struct clk_hw *_of_fixed_factor_clk_setup(struct device_node *node) of_property_read_string(node, "clock-output-names", &clk_name); - if (of_match_node(set_rate_parent_matches, node)) - flags |= CLK_SET_RATE_PARENT; - hw = __clk_hw_register_fixed_factor(NULL, node, clk_name, NULL, 0, - flags, mult, div, false); + 0, mult, div, false); if (IS_ERR(hw)) { /* * Clear OF_POPULATED flag so that clock registration can be |