diff options
| author |   Herve Codina <herve.codina@bootlin.com> | 2022-07-04 12:28:43 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-07-19 00:04:10 -0700 |
| commit | 25c2a075eb6a3031813b6051bd10dfc22c36a2a4 (patch) | |
| tree | dfeac69daeb2568d161974e8a6cf1e94b5c52abd /drivers/clk/clk-lan966x.c | |
| parent | MAINTAINERS: add include/dt-bindings/clock to COMMON CLK FRAMEWORK (diff) | |
| download | wireguard-linux-25c2a075eb6a3031813b6051bd10dfc22c36a2a4.tar.xz wireguard-linux-25c2a075eb6a3031813b6051bd10dfc22c36a2a4.zip | |
clk: lan966x: Fix the lan966x clock gate register address
The register address used for the clock gate register is the base
register address coming from first reg map (ie. the generic
clock registers) instead of the second reg map defining the clock
gate register.
Use the correct clock gate register address.
Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20220704102845.168438-2-herve.codina@bootlin.com
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-lan966x.c')
| -rw-r--r-- | drivers/clk/clk-lan966x.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c index d1535ac13e89..81cb90955d68 100644 --- a/drivers/clk/clk-lan966x.c +++ b/drivers/clk/clk-lan966x.c @@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev, hw_data->hws[i] = devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name, - "lan966x", 0, base, + "lan966x", 0, gate_base, clk_gate_desc[idx].bit_idx, 0, &clk_gate_lock); |