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| author |   Mark Brown <broonie@kernel.org> | 2023-09-29 16:26:08 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2023-10-09 20:31:23 -0700 |
| commit | 9e952929dfe22aa1566d930f363213e1ccfe004d (patch) | |
| tree | 44d67bb0e4985d74c2cfa99c07a4aca7dbb7d2ee /drivers/clk/clk-versaclock7.c | |
| parent | clk: versaclock5: Convert to use maple tree register cache (diff) | |
| download | wireguard-linux-9e952929dfe22aa1566d930f363213e1ccfe004d.tar.xz wireguard-linux-9e952929dfe22aa1566d930f363213e1ccfe004d.zip | |
clk: versaclock7: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-4-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-versaclock7.c')
| -rw-r--r-- | drivers/clk/clk-versaclock7.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/clk-versaclock7.c b/drivers/clk/clk-versaclock7.c index 9ab35c1af0ff..f323263e32c3 100644 --- a/drivers/clk/clk-versaclock7.c +++ b/drivers/clk/clk-versaclock7.c @@ -1275,7 +1275,7 @@ static const struct regmap_config vc7_regmap_config = { .ranges = vc7_range_cfg, .num_ranges = ARRAY_SIZE(vc7_range_cfg), .volatile_reg = vc7_volatile_reg, - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, .can_multi_write = true, .reg_format_endian = REGMAP_ENDIAN_LITTLE, .val_format_endian = REGMAP_ENDIAN_LITTLE, |