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| author |   Jiangshan Yi <yijiangshan@kylinos.cn> | 2022-09-05 14:58:33 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-09-30 13:46:22 -0700 |
| commit | 225bb79123ea7ecd555a4992ff41414dd9cd604e (patch) | |
| tree | 2e9c4ab61eff6eda5aab288d2aacbe7ade17c8a8 /drivers/clk/davinci | |
| parent | MAINTAINERS: add header file to TI DAVINCI SERIES CLOCK DRIVER (diff) | |
| download | wireguard-linux-225bb79123ea7ecd555a4992ff41414dd9cd604e.tar.xz wireguard-linux-225bb79123ea7ecd555a4992ff41414dd9cd604e.zip | |
clk: davinci: pll: fix spelling typo in comment
Fix spelling typo in comment.
Reported-by: k2ci <kernel-bot@kylinos.cn>
Signed-off-by: Jiangshan Yi <yijiangshan@kylinos.cn>
Link: https://lore.kernel.org/r/20220905065833.1831473-1-13667453960@163.com
Reviewed-by: David Lechner <david@lechnology.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/davinci')
| -rw-r--r-- | drivers/clk/davinci/pll.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/davinci/pll.c b/drivers/clk/davinci/pll.c index 0d750433eb42..c53dd4ff8530 100644 --- a/drivers/clk/davinci/pll.c +++ b/drivers/clk/davinci/pll.c @@ -98,7 +98,7 @@ * @hw: clk_hw for the pll * @base: Base memory address * @pllm_min: The minimum allowable PLLM[PLLM] value - * @pllm_max: The maxiumum allowable PLLM[PLLM] value + * @pllm_max: The maximum allowable PLLM[PLLM] value * @pllm_mask: Bitmask for PLLM[PLLM] value */ struct davinci_pll_clk { |