diff options
| author |   Abel Vesa <abel.vesa@nxp.com> | 2020-10-28 14:58:58 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2020-11-03 07:55:11 +0800 |
| commit | 12309428c27737c21735fb28540c6c6f69f632f6 (patch) | |
| tree | c391bdd8b4e4d6c9845c6ac2fcfdaccd66ff83b2 /drivers/clk/imx/clk-gate2.c | |
| parent | clk: imx: scu: fix build break when compiled as modules (diff) | |
| download | wireguard-linux-12309428c27737c21735fb28540c6c6f69f632f6.tar.xz wireguard-linux-12309428c27737c21735fb28540c6c6f69f632f6.zip | |
clk: imx: gate2: Remove the IMX_CLK_GATE2_SINGLE_BIT special case
This was a hack which would allow multiple HW gates to be controlled
by a single bit. The only user of this is the imx_dev_clk_hw_gate_shared
which is not used anywhere as of now. Basically, complicates the logic
of the driver for no reason.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-gate2.c')
| -rw-r--r-- | drivers/clk/imx/clk-gate2.c | 28 |
1 files changed, 7 insertions, 21 deletions
diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c index 7eed7083f46e..49952eec4e28 100644 --- a/drivers/clk/imx/clk-gate2.c +++ b/drivers/clk/imx/clk-gate2.c @@ -49,14 +49,10 @@ static int clk_gate2_enable(struct clk_hw *hw) if (gate->share_count && (*gate->share_count)++ > 0) goto out; - if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) { - ret = clk_gate_ops.enable(hw); - } else { - reg = readl(gate->reg); - reg &= ~(3 << gate->bit_idx); - reg |= gate->cgr_val << gate->bit_idx; - writel(reg, gate->reg); - } + reg = readl(gate->reg); + reg &= ~(3 << gate->bit_idx); + reg |= gate->cgr_val << gate->bit_idx; + writel(reg, gate->reg); out: spin_unlock_irqrestore(gate->lock, flags); @@ -79,13 +75,9 @@ static void clk_gate2_disable(struct clk_hw *hw) goto out; } - if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) { - clk_gate_ops.disable(hw); - } else { - reg = readl(gate->reg); - reg &= ~(3 << gate->bit_idx); - writel(reg, gate->reg); - } + reg = readl(gate->reg); + reg &= ~(3 << gate->bit_idx); + writel(reg, gate->reg); out: spin_unlock_irqrestore(gate->lock, flags); @@ -105,9 +97,6 @@ static int clk_gate2_is_enabled(struct clk_hw *hw) { struct clk_gate2 *gate = to_clk_gate2(hw); - if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) - return clk_gate_ops.is_enabled(hw); - return clk_gate2_reg_is_enabled(gate->reg, gate->bit_idx); } @@ -117,9 +106,6 @@ static void clk_gate2_disable_unused(struct clk_hw *hw) unsigned long flags; u32 reg; - if (gate->flags & IMX_CLK_GATE2_SINGLE_BIT) - return; - spin_lock_irqsave(gate->lock, flags); if (!gate->share_count || *gate->share_count == 0) { |