diff options
| author |   AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-03-06 15:05:11 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2023-03-13 11:50:15 -0700 |
| commit | 4c85e20b656607897e3bb06ff565822fa4b4de95 (patch) | |
| tree | 70c862fa0f44fa11dd88bdbe36caa4753bcd0b04 /drivers/clk/mediatek/clk-mt6765-mm.c | |
| parent | clk: mediatek: mt8183: Convert all remaining clocks to common probe (diff) | |
| download | wireguard-linux-4c85e20b656607897e3bb06ff565822fa4b4de95.tar.xz wireguard-linux-4c85e20b656607897e3bb06ff565822fa4b4de95.zip | |
clk: mediatek: Consistently use GATE_MTK() macro
All the various MediaTek clock drivers are, in a way or another,
redefining the GATE_MTK() macro with different names: while some
are doing that by actually using GATE_MTK(), others are copying
it entirely (hence, entirely redefining it).
Change all clock drivers to always and consistently use this macro.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks
Link: https://lore.kernel.org/r/20230306140543.1813621-23-angelogioacchino.delregno@collabora.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/mediatek/clk-mt6765-mm.c')
| -rw-r--r-- | drivers/clk/mediatek/clk-mt6765-mm.c | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/clk/mediatek/clk-mt6765-mm.c b/drivers/clk/mediatek/clk-mt6765-mm.c index bda774668a36..a4570c9dbefa 100644 --- a/drivers/clk/mediatek/clk-mt6765-mm.c +++ b/drivers/clk/mediatek/clk-mt6765-mm.c @@ -18,14 +18,8 @@ static const struct mtk_gate_regs mm_cg_regs = { .sta_ofs = 0x100, }; -#define GATE_MM(_id, _name, _parent, _shift) { \ - .id = _id, \ - .name = _name, \ - .parent_name = _parent, \ - .regs = &mm_cg_regs, \ - .shift = _shift, \ - .ops = &mtk_clk_gate_ops_setclr, \ - } +#define GATE_MM(_id, _name, _parent, _shift) \ + GATE_MTK(_id, _name, _parent, &mm_cg_regs, _shift, &mtk_clk_gate_ops_setclr) static const struct mtk_gate mm_clks[] = { /* MM */ |