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author | Arnd Bergmann <arnd@arndb.de> | 2019-09-18 15:34:10 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2022-05-07 22:55:49 +0200 |
commit | 5c6603e741921c75f67a724e798642ed50a6328e (patch) | |
tree | 8b40f34662aa0620eb1bedda58d9a8fa19c00584 /drivers/clk/pxa | |
parent | ARM: pxa: remove get_clk_frequency_khz() (diff) | |
download | wireguard-linux-5c6603e741921c75f67a724e798642ed50a6328e.tar.xz wireguard-linux-5c6603e741921c75f67a724e798642ed50a6328e.zip |
cpufreq: pxa3: move clk register access to clk driver
The driver needs some low-level register access for setting
the core and bus frequencies. These registers are owned
by the clk driver, so move the low-level access into that
driver with a slightly higher-level interface and avoid
any machine header file dependencies.
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: linux-clk@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/clk/pxa')
-rw-r--r-- | drivers/clk/pxa/clk-pxa3xx.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c index 027b78183565..60a0db4f3790 100644 --- a/drivers/clk/pxa/clk-pxa3xx.c +++ b/drivers/clk/pxa/clk-pxa3xx.c @@ -16,6 +16,7 @@ #include <linux/of.h> #include <linux/soc/pxa/cpu.h> #include <mach/smemc.h> +#include <linux/clk/pxa.h> #include <mach/pxa3xx-regs.h> #include <dt-bindings/clock/pxa-clock.h> @@ -79,6 +80,21 @@ unsigned int pxa3xx_get_clk_frequency_khz(int info) return (unsigned int)clks[0] / KHz; } +void pxa3xx_clk_update_accr(u32 disable, u32 enable, u32 xclkcfg, u32 mask) +{ + u32 accr = ACCR; + + accr &= ~disable; + accr |= enable; + + ACCR = accr; + if (xclkcfg) + __asm__("mcr p14, 0, %0, c6, c0, 0\n" : : "r"(xclkcfg)); + + while ((ACSR & mask) != (accr & mask)) + cpu_relax(); +} + static unsigned long clk_pxa3xx_ac97_get_rate(struct clk_hw *hw, unsigned long parent_rate) { |