diff options
| author |   Robert Jarzmik <robert.jarzmik@free.fr> | 2016-10-23 14:19:28 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2016-11-01 17:46:53 -0700 |
| commit | 7c5145191b2c5351ebc049f9a7108a6548889d56 (patch) | |
| tree | 46409cec7d4378f5c4332b460c066afb5ab8c288 /drivers/clk/pxa | |
| parent | clk: pxa: core pll is not affected by t bit (diff) | |
| download | wireguard-linux-7c5145191b2c5351ebc049f9a7108a6548889d56.tar.xz wireguard-linux-7c5145191b2c5351ebc049f9a7108a6548889d56.zip | |
clk: pxa: b bit of clkcfg means fast bus
The meaning of this bit was inverted :
- when set to 0, system bus clock is half of the CPU run clock
- when set to 1, system bus clock is the CPU run clock
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/pxa')
| -rw-r--r-- | drivers/clk/pxa/clk-pxa27x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c index 3930053543a3..3b36e8d0f81e 100644 --- a/drivers/clk/pxa/clk-pxa27x.c +++ b/drivers/clk/pxa/clk-pxa27x.c @@ -291,9 +291,9 @@ static unsigned long clk_pxa27x_system_bus_get_rate(struct clk_hw *hw, if (osc_forced) return parent_rate; if (b) - return parent_rate / 2; - else return parent_rate; + else + return parent_rate / 2; } static u8 clk_pxa27x_system_bus_get_parent(struct clk_hw *hw) |