diff options
| author |   Georgi Djakov <georgi.djakov@linaro.org> | 2015-03-20 18:30:24 +0200 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2015-03-23 15:50:53 -0700 |
| commit | 7f218978f10693f65e35b0bbcdcd539fbe78221a (patch) | |
| tree | 7f83ff1dfa6340053dc005784ff9930d4e101807 /drivers/clk/qcom | |
| parent | clk: qcom: fix RCG M/N counter configuration (diff) | |
| download | wireguard-linux-7f218978f10693f65e35b0bbcdcd539fbe78221a.tar.xz wireguard-linux-7f218978f10693f65e35b0bbcdcd539fbe78221a.zip | |
clk: qcom: Fix clk_get_parent function return value
According to the common clock framework API, the clk_get_parent() function
should return u8. Currently we are returning negative values on error. Fix
this and use the default parent in case of an error.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
| -rw-r--r-- | drivers/clk/qcom/clk-rcg.c | 26 | ||||
| -rw-r--r-- | drivers/clk/qcom/clk-rcg2.c | 7 |
2 files changed, 24 insertions, 9 deletions
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index 466f30ca65c2..59a093e56366 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c @@ -47,15 +47,20 @@ static u8 clk_rcg_get_parent(struct clk_hw *hw) struct clk_rcg *rcg = to_clk_rcg(hw); int num_parents = __clk_get_num_parents(hw->clk); u32 ns; - int i; + int i, ret; - regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns); + ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg, &ns); + if (ret) + goto err; ns = ns_to_src(&rcg->s, ns); for (i = 0; i < num_parents; i++) if (ns == rcg->s.parent_map[i]) return i; - return -EINVAL; +err: + pr_debug("%s: Clock %s has invalid parent, using default.\n", + __func__, __clk_get_name(hw->clk)); + return 0; } static int reg_to_bank(struct clk_dyn_rcg *rcg, u32 bank) @@ -70,21 +75,28 @@ static u8 clk_dyn_rcg_get_parent(struct clk_hw *hw) int num_parents = __clk_get_num_parents(hw->clk); u32 ns, reg; int bank; - int i; + int i, ret; struct src_sel *s; - regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + ret = regmap_read(rcg->clkr.regmap, rcg->bank_reg, ®); + if (ret) + goto err; bank = reg_to_bank(rcg, reg); s = &rcg->s[bank]; - regmap_read(rcg->clkr.regmap, rcg->ns_reg[bank], &ns); + ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg[bank], &ns); + if (ret) + goto err; ns = ns_to_src(s, ns); for (i = 0; i < num_parents; i++) if (ns == s->parent_map[i]) return i; - return -EINVAL; +err: + pr_debug("%s: Clock %s has invalid parent, using default.\n", + __func__, __clk_get_name(hw->clk)); + return 0; } static int clk_rcg_set_parent(struct clk_hw *hw, u8 index) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 381f27469a9c..10c2e45832b8 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -69,7 +69,7 @@ static u8 clk_rcg2_get_parent(struct clk_hw *hw) ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg); if (ret) - return ret; + goto err; cfg &= CFG_SRC_SEL_MASK; cfg >>= CFG_SRC_SEL_SHIFT; @@ -78,7 +78,10 @@ static u8 clk_rcg2_get_parent(struct clk_hw *hw) if (cfg == rcg->parent_map[i]) return i; - return -EINVAL; +err: + pr_debug("%s: Clock %s has invalid parent, using default.\n", + __func__, __clk_get_name(hw->clk)); + return 0; } static int update_config(struct clk_rcg2 *rcg) |