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| author |   Icenowy Zheng <icenowy@aosc.io> | 2018-05-04 02:38:41 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2018-05-04 17:05:46 +0200 |
| commit | b7c7b05065aa77ae3d7b70b9139ed58970daed78 (patch) | |
| tree | d241bfa4719e5a3020602704a5ed41c00084b8d3 /drivers/clk/sunxi-ng/Kconfig | |
| parent | Linux 4.17-rc1 (diff) | |
| download | wireguard-linux-b7c7b05065aa77ae3d7b70b9139ed58970daed78.tar.xz wireguard-linux-b7c7b05065aa77ae3d7b70b9139ed58970daed78.zip | |
clk: sunxi-ng: add support for H6 PRCM CCU
The H6 has clock/reset controls in PRCM part, like old SoCs such as H3
and A64. However, the PRCM CCU is rearranged; the register arragement
is now similar to the main CCU of H6, and the PRCM now has two APB
buses to control -- one is clocked from AHB clock derivde from AR100
clock, the other is clocked from the same mux with AR100 clock.
Therefore a new driver is written for it.
As there's no official document about the PRCM in H6, all the information
are indirectly collected from BSP and parts of the document, and the
information source is noted as comments in the driver's source code. If
reliable information is provided furtherly, the driver needs to be
rechecked.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/Kconfig')
| -rw-r--r-- | drivers/clk/sunxi-ng/Kconfig | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig index 79dfd296c3d1..826674d090fd 100644 --- a/drivers/clk/sunxi-ng/Kconfig +++ b/drivers/clk/sunxi-ng/Kconfig @@ -16,6 +16,11 @@ config SUN50I_H6_CCU default ARM64 && ARCH_SUNXI depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST +config SUN50I_H6_R_CCU + bool "Support for the Allwinner H6 PRCM CCU" + default ARM64 && ARCH_SUNXI + depends on (ARM64 && ARCH_SUNXI) || COMPILE_TEST + config SUN4I_A10_CCU bool "Support for the Allwinner A10/A20 CCU" default MACH_SUN4I |