diff options
| author |   Icenowy Zheng <icenowy@aosc.io> | 2017-05-15 00:30:34 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2017-06-07 15:32:12 +0200 |
| commit | 763c5bd045b1098be444142403398f1414fd42fb (patch) | |
| tree | be40aad1e47035b478bc8f13d845a759731620c9 /drivers/clk/sunxi-ng/ccu-sun8i-de2.h | |
| parent | dt-bindings: add binding for the Allwinner DE2 CCU (diff) | |
| download | wireguard-linux-763c5bd045b1098be444142403398f1414fd42fb.tar.xz wireguard-linux-763c5bd045b1098be444142403398f1414fd42fb.zip | |
clk: sunxi-ng: add support for DE2 CCU
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/clk/sunxi-ng/ccu-sun8i-de2.h')
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-de2.h | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.h b/drivers/clk/sunxi-ng/ccu-sun8i-de2.h new file mode 100644 index 000000000000..530c006e0ae9 --- /dev/null +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.h @@ -0,0 +1,28 @@ +/* + * Copyright 2016 Icenowy Zheng <icenowy@aosc.io> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _CCU_SUN8I_DE2_H_ +#define _CCU_SUN8I_DE2_H_ + +#include <dt-bindings/clock/sun8i-de2.h> +#include <dt-bindings/reset/sun8i-de2.h> + +/* Intermediary clock dividers are not exported */ +#define CLK_MIXER0_DIV 3 +#define CLK_MIXER1_DIV 4 +#define CLK_WB_DIV 5 + +#define CLK_NUMBER (CLK_WB + 1) + +#endif /* _CCU_SUN8I_DE2_H_ */ |