diff options
| author |   Yang Yingliang <yangyingliang@huawei.com> | 2021-05-18 12:42:47 +0800 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2021-06-02 11:08:00 +0200 |
| commit | f13570e7e830ca4fbf4869015af8492b8918445e (patch) | |
| tree | ae444eacf681904c6b8ca6494fc85f78831eb08b /drivers/clk/tegra/clk-tegra124-emc.c | |
| parent | clk: tegra: Add stubs needed for compile-testing (diff) | |
| download | wireguard-linux-f13570e7e830ca4fbf4869015af8492b8918445e.tar.xz wireguard-linux-f13570e7e830ca4fbf4869015af8492b8918445e.zip | |
clk: tegra: tegra124-emc: Fix clock imbalance in emc_set_timing()
After calling clk_prepare_enable(), clk_disable_unprepare() needs
be called when prepare_timing_change() failed.
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra124-emc.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra124-emc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra124-emc.c b/drivers/clk/tegra/clk-tegra124-emc.c index bdf6f4a51617..74c1d894cca8 100644 --- a/drivers/clk/tegra/clk-tegra124-emc.c +++ b/drivers/clk/tegra/clk-tegra124-emc.c @@ -249,8 +249,10 @@ static int emc_set_timing(struct tegra_clk_emc *tegra, div = timing->parent_rate / (timing->rate / 2) - 2; err = tegra->prepare_timing_change(emc, timing->rate); - if (err) + if (err) { + clk_disable_unprepare(timing->parent); return err; + } spin_lock_irqsave(tegra->lock, flags); |