diff options
| author |   Tomeu Vizoso <tomeu.vizoso@collabora.com> | 2015-03-12 15:48:07 +0100 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2015-05-13 15:17:12 +0200 |
| commit | ac67477f8f4163a6e7678f252030051f4eef2d5f (patch) | |
| tree | ba115bec78344854ce37175f56c33764afe1ab6e /drivers/clk/tegra/clk-tegra124.c | |
| parent | clk: tegra: Add EMC clock driver (diff) | |
| download | wireguard-linux-ac67477f8f4163a6e7678f252030051f4eef2d5f.tar.xz wireguard-linux-ac67477f8f4163a6e7678f252030051f4eef2d5f.zip | |
clk: tegra: Set the EMC clock as the parent of the MC clock
On Tegra124, as we now have a proper driver for the EMC.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra124.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra124.c | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 096261d0a44e..e8cca3eac007 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -152,11 +152,6 @@ static unsigned long tegra124_input_freq[] = { [12] = 260000000, }; -static const char *mux_pllmcp_clkm[] = { - "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud", "pll_c2", "pll_c3", -}; -#define mux_pllmcp_clkm_idx NULL - static struct div_nmp pllxc_nmp = { .divm_shift = 0, .divm_width = 8, @@ -1126,13 +1121,7 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base, periph_clk_enb_refcnt); clks[TEGRA124_CLK_DSIB] = clk; - /* emc mux */ - clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, - ARRAY_SIZE(mux_pllmcp_clkm), 0, - clk_base + CLK_SOURCE_EMC, - 29, 3, 0, &emc_lock); - - clk = tegra_clk_register_mc("mc", "emc_mux", clk_base + CLK_SOURCE_EMC, + clk = tegra_clk_register_mc("mc", "emc", clk_base + CLK_SOURCE_EMC, &emc_lock); clks[TEGRA124_CLK_MC] = clk; |