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| author |   Lee Jones <lee.jones@linaro.org> | 2021-01-26 12:45:26 +0000 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2021-02-11 11:53:30 -0800 |
| commit | a89bd29a53d99f6106f5dca386c174a84abceb04 (patch) | |
| tree | 4622023e1cbc24d12daf2ec848fca66467bb6757 /drivers/clk/tegra/clk-tegra30.c | |
| parent | clk: qcom: clk-regmap: Provide missing description for 'devm_clk_register_regmap()'s dev param (diff) | |
| download | wireguard-linux-a89bd29a53d99f6106f5dca386c174a84abceb04.tar.xz wireguard-linux-a89bd29a53d99f6106f5dca386c174a84abceb04.zip | |
clk: tegra: clk-tegra30: Remove unused variable 'reg'
Fixes the following W=1 kernel build warning(s):
drivers/clk/tegra/clk-tegra30.c: In function ‘tegra30_enable_cpu_clock’:
drivers/clk/tegra/clk-tegra30.c:1107:15: warning: variable ‘reg’ set but not used [-Wunused-but-set-variable]
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Link: https://lore.kernel.org/r/20210126124540.3320214-8-lee.jones@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/tegra/clk-tegra30.c')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra30.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 37244a7e68c2..f72882f433ad 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -1104,12 +1104,9 @@ static void tegra30_cpu_out_of_reset(u32 cpu) static void tegra30_enable_cpu_clock(u32 cpu) { - unsigned int reg; - writel(CPU_CLOCK(cpu), clk_base + TEGRA30_CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR); - reg = readl(clk_base + - TEGRA30_CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR); + readl(clk_base + TEGRA30_CLK_RST_CONTROLLER_CLK_CPU_CMPLX_CLR); } static void tegra30_disable_cpu_clock(u32 cpu) |