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authorRajkumar Kasirajan <rkasirajan@nvidia.com>2022-04-06 16:17:01 +0100
committerThierry Reding <treding@nvidia.com>2022-05-04 11:30:51 +0200
commit6a7ace2b99706a17b3f38e0114172abaeb00f240 (patch)
tree6e3888ddcd0ca4af69fc5bca8ad12ca367d9ba7c /drivers/clk/tegra
parentclk: tegra: Register clocks from root to leaf (diff)
downloadwireguard-linux-6a7ace2b99706a17b3f38e0114172abaeb00f240.tar.xz
wireguard-linux-6a7ace2b99706a17b3f38e0114172abaeb00f240.zip
clk: tegra: Replace .round_rate() with .determine_rate()
Replace the .round_rate() callback with .determine_rate() which can consider max_rate imposed by clk_set_max_rate() while rounding the clock rate. Note that if the .determine_rate() callback is defined it will be called instead of the .round_rate() callback when calling clk_round_rate(). By using .determine_rate(), the maximum rate returned when calling clk_round_rate() is now limited by the current max_rate. Signed-off-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> [jonathanh@nvidia.com: checkpatch fixes and commit message update] Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/clk/tegra')
-rw-r--r--drivers/clk/tegra/clk-bpmp.c15
1 files changed, 10 insertions, 5 deletions
diff --git a/drivers/clk/tegra/clk-bpmp.c b/drivers/clk/tegra/clk-bpmp.c
index bacaa468e114..3748a39dae7c 100644
--- a/drivers/clk/tegra/clk-bpmp.c
+++ b/drivers/clk/tegra/clk-bpmp.c
@@ -164,15 +164,18 @@ static unsigned long tegra_bpmp_clk_recalc_rate(struct clk_hw *hw,
return response.rate;
}
-static long tegra_bpmp_clk_round_rate(struct clk_hw *hw, unsigned long rate,
- unsigned long *parent_rate)
+static int tegra_bpmp_clk_determine_rate(struct clk_hw *hw,
+ struct clk_rate_request *rate_req)
{
struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
struct cmd_clk_round_rate_response response;
struct cmd_clk_round_rate_request request;
struct tegra_bpmp_clk_message msg;
+ unsigned long rate;
int err;
+ rate = min(max(rate_req->rate, rate_req->min_rate), rate_req->max_rate);
+
memset(&request, 0, sizeof(request));
request.rate = min_t(u64, rate, S64_MAX);
@@ -188,7 +191,9 @@ static long tegra_bpmp_clk_round_rate(struct clk_hw *hw, unsigned long rate,
if (err < 0)
return err;
- return response.rate;
+ rate_req->rate = (unsigned long)response.rate;
+
+ return 0;
}
static int tegra_bpmp_clk_set_parent(struct clk_hw *hw, u8 index)
@@ -290,7 +295,7 @@ static const struct clk_ops tegra_bpmp_clk_rate_ops = {
.unprepare = tegra_bpmp_clk_unprepare,
.is_prepared = tegra_bpmp_clk_is_prepared,
.recalc_rate = tegra_bpmp_clk_recalc_rate,
- .round_rate = tegra_bpmp_clk_round_rate,
+ .determine_rate = tegra_bpmp_clk_determine_rate,
.set_rate = tegra_bpmp_clk_set_rate,
};
@@ -299,7 +304,7 @@ static const struct clk_ops tegra_bpmp_clk_mux_rate_ops = {
.unprepare = tegra_bpmp_clk_unprepare,
.is_prepared = tegra_bpmp_clk_is_prepared,
.recalc_rate = tegra_bpmp_clk_recalc_rate,
- .round_rate = tegra_bpmp_clk_round_rate,
+ .determine_rate = tegra_bpmp_clk_determine_rate,
.set_parent = tegra_bpmp_clk_set_parent,
.get_parent = tegra_bpmp_clk_get_parent,
.set_rate = tegra_bpmp_clk_set_rate,