diff options
| author |   Philippe Begnic <philippe.begnic@st.com> | 2013-05-27 14:41:29 +0200 |
|---|---|---|
| committer |   Mike Turquette <mturquette@linaro.org> | 2013-06-06 18:16:04 -0700 |
| commit | 1237e598a94b5a44a0162a4f4534d18ef8a81a7d (patch) | |
| tree | 819febac1b0cc844509deedd3068977a43e93f58 /drivers/clk/ux500 | |
| parent | clk: tegra114: Fix msenc clock register (diff) | |
| download | wireguard-linux-1237e598a94b5a44a0162a4f4534d18ef8a81a7d.tar.xz wireguard-linux-1237e598a94b5a44a0162a4f4534d18ef8a81a7d.zip | |
clk: ux500: Pass clock base adresses in initcall for u8540 and u9540
Align on u8500 version, pass clock base address in clk_init functions
for u8540 and u9540.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Signed-off-by: Philippe Begnic <philippe.begnic@st.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/ux500')
| -rw-r--r-- | drivers/clk/ux500/u8540_clk.c | 4 | ||||
| -rw-r--r-- | drivers/clk/ux500/u9540_clk.c | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c index 10adfd2ead21..90f3c88694b9 100644 --- a/drivers/clk/ux500/u8540_clk.c +++ b/drivers/clk/ux500/u8540_clk.c @@ -12,10 +12,10 @@ #include <linux/clk-provider.h> #include <linux/mfd/dbx500-prcmu.h> #include <linux/platform_data/clk-ux500.h> - #include "clk.h" -void u8540_clk_init(void) +void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base) { /* register clocks here */ } diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c index dbc0191e16c8..44794782e7e0 100644 --- a/drivers/clk/ux500/u9540_clk.c +++ b/drivers/clk/ux500/u9540_clk.c @@ -12,10 +12,10 @@ #include <linux/clk-provider.h> #include <linux/mfd/dbx500-prcmu.h> #include <linux/platform_data/clk-ux500.h> - #include "clk.h" -void u9540_clk_init(void) +void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, + u32 clkrst5_base, u32 clkrst6_base) { /* register clocks here */ } |