diff options
| author |   Rahul Tanwar <rtanwar@maxlinear.com> | 2022-10-13 14:48:30 +0800 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2022-10-17 14:17:37 -0700 |
| commit | 036177310bac5534de44ff6a7b60a4d2c0b6567c (patch) | |
| tree | 88d7f7c9efc47a6c0001dddb4e28597c39adb7ad /drivers/clk/x86/clk-lgm.c | |
| parent | Linux 6.1-rc1 (diff) | |
| download | wireguard-linux-036177310bac5534de44ff6a7b60a4d2c0b6567c.tar.xz wireguard-linux-036177310bac5534de44ff6a7b60a4d2c0b6567c.zip | |
clk: mxl: Switch from direct readl/writel based IO to regmap based IO
Earlier version of driver used direct io remapped register read
writes using readl/writel. But we need secure boot access which
is only possible when registers are read & written using regmap.
This is because the security bus/hook is written & coupled only
with regmap layer.
Switch the driver from direct readl/writel based register accesses
to regmap based register accesses.
Additionally, update the license headers to latest status.
Reviewed-by: Yi xin Zhu <yzhu@maxlinear.com>
Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com>
Link: https://lore.kernel.org/r/2610331918206e0e3bd18babb39393a558fb34f9.1665642720.git.rtanwar@maxlinear.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/x86/clk-lgm.c')
| -rw-r--r-- | drivers/clk/x86/clk-lgm.c | 13 |
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/clk/x86/clk-lgm.c b/drivers/clk/x86/clk-lgm.c index 020f4e83a5cc..4fa2bcaf71c8 100644 --- a/drivers/clk/x86/clk-lgm.c +++ b/drivers/clk/x86/clk-lgm.c @@ -1,10 +1,12 @@ // SPDX-License-Identifier: GPL-2.0 /* + * Copyright (C) 2020-2022 MaxLinear, Inc. * Copyright (C) 2020 Intel Corporation. - * Zhu YiXin <yixin.zhu@intel.com> - * Rahul Tanwar <rahul.tanwar@intel.com> + * Zhu Yixin <yzhu@maxlinear.com> + * Rahul Tanwar <rtanwar@maxlinear.com> */ #include <linux/clk-provider.h> +#include <linux/mfd/syscon.h> #include <linux/of.h> #include <linux/platform_device.h> #include <dt-bindings/clock/intel,lgm-clk.h> @@ -433,9 +435,12 @@ static int lgm_cgu_probe(struct platform_device *pdev) ctx->clk_data.num = CLK_NR_CLKS; - ctx->membase = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(ctx->membase)) + ctx->membase = syscon_node_to_regmap(np); + if (IS_ERR_OR_NULL(ctx->membase)) { + dev_err(dev, "Failed to get clk CGU iomem\n"); return PTR_ERR(ctx->membase); + } + ctx->np = np; ctx->dev = dev; |