diff options
| author |   Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-07-11 01:08:12 +0200 |
|---|---|---|
| committer |   Daniel Lezcano <daniel.lezcano@linaro.org> | 2020-07-11 18:58:18 +0200 |
| commit | 501465d5d7af63af5942cf6af783952bdd757c52 (patch) | |
| tree | fe4dde2d57b56a85a4060ae399b9949518fd860f /drivers/clocksource | |
| parent | clocksource/drivers/timer-atmel-tcb: Stop using the 32kHz for clockevents (diff) | |
| download | wireguard-linux-501465d5d7af63af5942cf6af783952bdd757c52.tar.xz wireguard-linux-501465d5d7af63af5942cf6af783952bdd757c52.zip | |
clocksource/drivers/timer-atmel-tcb: Allow selecting first divider
The divider selection algorithm never allowed to get index 0. It was also
continuing to look for dividers, trying to find the slow clock selection.
This is not necessary anymore.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200710230813.1005150-9-alexandre.belloni@bootlin.com
Diffstat (limited to 'drivers/clocksource')
| -rw-r--r-- | drivers/clocksource/timer-atmel-tcb.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/clocksource/timer-atmel-tcb.c b/drivers/clocksource/timer-atmel-tcb.c index 7a6474acc774..7fea134650fc 100644 --- a/drivers/clocksource/timer-atmel-tcb.c +++ b/drivers/clocksource/timer-atmel-tcb.c @@ -432,10 +432,8 @@ static int __init tcb_clksrc_init(struct device_node *node) tmp = rate / divisor; pr_debug("TC: %u / %-3u [%d] --> %u\n", rate, divisor, i, tmp); - if (best_divisor_idx > 0) { - if (tmp < 5 * 1000 * 1000) - continue; - } + if ((best_divisor_idx >= 0) && (tmp < 5 * 1000 * 1000)) + break; divided_rate = tmp; best_divisor_idx = i; } |