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author | 2024-10-16 16:31:10 -0400 | |
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committer | 2024-10-23 13:25:48 +0200 | |
commit | 5d9aeaa607cbe77456ea6c44dfb725f86ea064ea (patch) | |
tree | aff20d514c194b302f2ba669d0877c69328a5225 /drivers/edac/fsl_ddr_edac.c | |
parent | EDAC/fsl_ddr: Pass down fsl_mc_pdata in ddr_in32() and ddr_out32() (diff) | |
download | wireguard-linux-5d9aeaa607cbe77456ea6c44dfb725f86ea064ea.tar.xz wireguard-linux-5d9aeaa607cbe77456ea6c44dfb725f86ea064ea.zip |
EDAC/fsl_ddr: Move global variables into struct fsl_mc_pdata
Move global variables into the struct fsl_mc_pdata to handle systems
with multiple DDR controllers.
No functional change.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20241016-imx95_edac-v3-2-86ae6fc2756a@nxp.com
Diffstat (limited to 'drivers/edac/fsl_ddr_edac.c')
-rw-r--r-- | drivers/edac/fsl_ddr_edac.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/drivers/edac/fsl_ddr_edac.c b/drivers/edac/fsl_ddr_edac.c index 9924c6b81664..7a9fb1202f1a 100644 --- a/drivers/edac/fsl_ddr_edac.c +++ b/drivers/edac/fsl_ddr_edac.c @@ -31,22 +31,18 @@ static int edac_mc_idx; -static u32 orig_ddr_err_disable; -static u32 orig_ddr_err_sbe; -static bool little_endian; - static inline u32 ddr_in32(struct fsl_mc_pdata *pdata, unsigned int off) { void __iomem *addr = pdata->mc_vbase + off; - return little_endian ? ioread32(addr) : ioread32be(addr); + return pdata->little_endian ? ioread32(addr) : ioread32be(addr); } static inline void ddr_out32(struct fsl_mc_pdata *pdata, unsigned int off, u32 value) { void __iomem *addr = pdata->mc_vbase + off; - if (little_endian) + if (pdata->little_endian) iowrite32(value, addr); else iowrite32be(value, addr); @@ -511,7 +507,7 @@ int fsl_mc_err_probe(struct platform_device *op) * Get the endianness of DDR controller registers. * Default is big endian. */ - little_endian = of_property_read_bool(op->dev.of_node, "little-endian"); + pdata->little_endian = of_property_read_bool(op->dev.of_node, "little-endian"); res = of_address_to_resource(op->dev.of_node, 0, &r); if (res) { @@ -562,7 +558,7 @@ int fsl_mc_err_probe(struct platform_device *op) fsl_ddr_init_csrows(mci); /* store the original error disable bits */ - orig_ddr_err_disable = ddr_in32(pdata, FSL_MC_ERR_DISABLE); + pdata->orig_ddr_err_disable = ddr_in32(pdata, FSL_MC_ERR_DISABLE); ddr_out32(pdata, FSL_MC_ERR_DISABLE, 0); /* clear all error bits */ @@ -579,8 +575,8 @@ int fsl_mc_err_probe(struct platform_device *op) DDR_EIE_MBEE | DDR_EIE_SBEE); /* store the original error management threshold */ - orig_ddr_err_sbe = ddr_in32(pdata, - FSL_MC_ERR_SBE) & 0xff0000; + pdata->orig_ddr_err_sbe = ddr_in32(pdata, + FSL_MC_ERR_SBE) & 0xff0000; /* set threshold to 1 error per interrupt */ ddr_out32(pdata, FSL_MC_ERR_SBE, 0x10000); @@ -628,8 +624,9 @@ void fsl_mc_err_remove(struct platform_device *op) } ddr_out32(pdata, FSL_MC_ERR_DISABLE, - orig_ddr_err_disable); - ddr_out32(pdata, FSL_MC_ERR_SBE, orig_ddr_err_sbe); + pdata->orig_ddr_err_disable); + ddr_out32(pdata, FSL_MC_ERR_SBE, pdata->orig_ddr_err_sbe); + edac_mc_del_mc(&op->dev); edac_mc_free(mci); |