diff options
| author |   Chao Qin <chao.qin@intel.com> | 2022-09-20 14:08:26 +0800 |
|---|---|---|
| committer |   Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2022-09-21 20:16:15 +0200 |
| commit | 2d93540014387d1c73b9ccc4d7895320df66d01b (patch) | |
| tree | e6054b5bfebf3e81b14d55e878e6c5a4a5e1e770 /drivers/fpga/fpga-bridge.c | |
| parent | powercap: intel_rapl: Add support for RAPTORLAKE_S (diff) | |
| download | wireguard-linux-2d93540014387d1c73b9ccc4d7895320df66d01b.tar.xz wireguard-linux-2d93540014387d1c73b9ccc4d7895320df66d01b.zip | |
powercap: intel_rapl: fix UBSAN shift-out-of-bounds issue
When value < time_unit, the parameter of ilog2() will be zero and
the return value is -1. u64(-1) is too large for shift exponent
and then will trigger shift-out-of-bounds:
shift exponent 18446744073709551615 is too large for 32-bit type 'int'
Call Trace:
rapl_compute_time_window_core
rapl_write_data_raw
set_time_window
store_constraint_time_window_us
Signed-off-by: Chao Qin <chao.qin@intel.com>
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions