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| author |   Linus Walleij <linus.walleij@linaro.org> | 2019-11-13 23:03:23 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2019-11-13 23:03:23 +0100 |
| commit | 1bcab70b782d6e2341ce47d6cca17c22a44ac6e4 (patch) | |
| tree | 14e95285d2053c8bc075a8c0da4492ea6e6e632c /drivers/gpio/gpiolib.c | |
| parent | Merge tag 'gpio-v5.5-updates-for-linus-part-2' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into devel (diff) | |
| parent | gpio: merrifield: Pass irqchip when adding gpiochip (diff) | |
| download | wireguard-linux-1bcab70b782d6e2341ce47d6cca17c22a44ac6e4.tar.xz wireguard-linux-1bcab70b782d6e2341ce47d6cca17c22a44ac6e4.zip | |
Merge tag 'intel-gpio-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/andy/linux-gpio-intel into devel
intel-gpio for v5.5-1
* Prerequisite patch against GPIO library to register pin ranges in time.
* Second attempt to fix Intel Merrifield GPIO driver to utilize irqchip.
The following is an automated git shortlog grouped by driver:
gpiolib:
- Introduce ->add_pin_ranges() callback
merrifield:
- Pass irqchip when adding gpiochip
- Add GPIO <-> pin mapping ranges via callback
Diffstat (limited to 'drivers/gpio/gpiolib.c')
| -rw-r--r-- | drivers/gpio/gpiolib.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index dba5f08f308c..8fdde922786b 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -390,6 +390,14 @@ static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) gpiochip->valid_mask = NULL; } +static int gpiochip_add_pin_ranges(struct gpio_chip *gc) +{ + if (gc->add_pin_ranges) + return gc->add_pin_ranges(gc); + + return 0; +} + bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip, unsigned int offset) { @@ -1520,6 +1528,10 @@ int gpiochip_add_data_with_key(struct gpio_chip *chip, void *data, } } + ret = gpiochip_add_pin_ranges(chip); + if (ret) + goto err_remove_of_chip; + acpi_gpiochip_add(chip); machine_gpiochip_add(chip); |