diff options
| author |   Alex Deucher <alexander.deucher@amd.com> | 2020-05-28 16:57:27 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2020-05-29 13:55:07 -0400 |
| commit | 258620d0b36f5aae7f32099f05817206bd4ae0d1 (patch) | |
| tree | 35febefcd5e7f9722a30f89c898ff98c323f27a9 /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | drm/amd/powerplay: give better names for the thermal IRQ related APIs (diff) | |
| download | wireguard-linux-258620d0b36f5aae7f32099f05817206bd4ae0d1.tar.xz wireguard-linux-258620d0b36f5aae7f32099f05817206bd4ae0d1.zip | |
drm/amdgpu: skip gpu_info firmware if discovery info is available
The GPU info firmware is only applicable at bring up when the
IP discovery table is not present. If it's available, use that
first and then fallback to parsing the gpu info firmware.
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index e5b639a1575e..b7373c03d471 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1533,6 +1533,11 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev) adev->firmware.gpu_info_fw = NULL; + if (amdgpu_discovery && adev->asic_type >= CHIP_NAVI10) { + amdgpu_discovery_get_gfx_info(adev); + return 0; + } + switch (adev->asic_type) { #ifdef CONFIG_DRM_AMDGPU_SI case CHIP_VERDE: @@ -1617,11 +1622,6 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev) (const struct gpu_info_firmware_v1_0 *)(adev->firmware.gpu_info_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); - if (amdgpu_discovery && adev->asic_type >= CHIP_NAVI10) { - amdgpu_discovery_get_gfx_info(adev); - goto parse_soc_bounding_box; - } - adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se); adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh); adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); @@ -1650,10 +1650,9 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev) le32_to_cpu(gpu_info_fw->num_packer_per_sc); } -parse_soc_bounding_box: /* * soc bounding box info is not integrated in disocovery table, - * we always need to parse it from gpu info firmware. + * we always need to parse it from gpu info firmware if needed. */ if (hdr->version_minor == 2) { const struct gpu_info_firmware_v1_2 *gpu_info_fw = |