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| author |   Le Ma <le.ma@amd.com> | 2022-03-01 19:42:29 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-06-09 09:43:41 -0400 |
| commit | 2a47a2d90e5cd96c24503061c8920a1e6ee248a0 (patch) | |
| tree | 9e0a241e27989e4de1cdbc7e44793312257707d0 /drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | |
| parent | drm/amdgpu: add support for SDMA on multiple AIDs (diff) | |
| download | wireguard-linux-2a47a2d90e5cd96c24503061c8920a1e6ee248a0.tar.xz wireguard-linux-2a47a2d90e5cd96c24503061c8920a1e6ee248a0.zip | |
drm/amdgpu: assign the doorbell index for sdma on non-AID0
Allocate new sdma doorbell index for the instances only on AID1 for now.
Todo: there's limitation that SDMA doorbell index on SDMA 4.4.2 needs to be
less than 0x1FF, so the tail part in _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT is not
enough to store sdma doorbell range on maximum 4 AIDs if doorbell_range is 20.
So it looks better to create a new doorbell index assignment table for 4.4.2.
v2: change "(x << 1) + 2" to "(x + 1) << 1" for readability.
Signed-off-by: Le Ma <le.ma@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h index ffb75d23d2fc..b036d2f01930 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell.h @@ -85,6 +85,7 @@ struct amdgpu_doorbell_index { uint32_t last_non_cp; uint32_t xcc1_kiq_start; uint32_t xcc1_mec_ring0_start; + uint32_t aid1_sdma_start; uint32_t max_assignment; /* Per engine SDMA doorbell size in dword */ uint32_t sdma_doorbell_range; @@ -171,7 +172,10 @@ typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT /* 8 compute rings per GC. Max to 0x1CE */ AMDGPU_VEGA20_DOORBELL_XCC1_MEC_RING0_START = 0x197, - AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x1CE, + /* AID1 SDMA: 0x1D0 ~ 0x1F7 */ + AMDGPU_VEGA20_DOORBELL_AID1_sDMA_START = 0x1D0, + + AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x1F7, AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF } AMDGPU_VEGA20_DOORBELL_ASSIGNMENT; |