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| author |   Ian Chen <ian.chen@amd.com> | 2022-11-28 16:17:34 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-12-15 12:18:18 -0500 |
| commit | 639f6ad6df7f47db48b59956b469a6917a136afb (patch) | |
| tree | b0858bc791b12d796575bf572dfaec7bd22e1e52 /drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | |
| parent | drm/amd/display: Block subvp if center timing is in use (diff) | |
| download | wireguard-linux-639f6ad6df7f47db48b59956b469a6917a136afb.tar.xz wireguard-linux-639f6ad6df7f47db48b59956b469a6917a136afb.zip | |
drm/amd/display: Revert Reduce delay when sink device not able to ACK 00340h write
[WHY]
It causes regression AMD source will not write DPCD 340.
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>
Acked-by: Jasdeep Dhillon <jdhillon@amd.com>
Signed-off-by: Ian Chen <ian.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c')
0 files changed, 0 insertions, 0 deletions