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| author |   Likun Gao <Likun.Gao@amd.com> | 2020-07-08 12:56:14 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-07-10 17:40:58 -0400 |
| commit | 1cb63593d5c5b763a8a40614488c10f18a64d042 (patch) | |
| tree | a4828933b09f2dffdb19a9fb091d8cf847218090 /drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | |
| parent | drm/amdgpu: don't do soft recovery if gpu_recovery=0 (diff) | |
| download | wireguard-linux-1cb63593d5c5b763a8a40614488c10f18a64d042.tar.xz wireguard-linux-1cb63593d5c5b763a8a40614488c10f18a64d042.zip | |
drm/amdgpu: remove unnecessary logic of ASIC check
Remove some unused ASIC check logic.
Remove some definition of amdgpu_device which only used by
the removed ASIC check logic.(V2)
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c index 1baeddf2f1e6..abb0ab653b10 100644 --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c @@ -485,7 +485,6 @@ static void sdma_v5_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) static void sdma_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq, unsigned flags) { - struct amdgpu_device *adev = ring->adev; bool write64bit = flags & AMDGPU_FENCE_FLAG_64BIT; /* write the fence */ amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE) | @@ -508,8 +507,7 @@ static void sdma_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 se amdgpu_ring_write(ring, upper_32_bits(seq)); } - /* Interrupt not work fine on GFX10.1 model yet. Use fallback instead */ - if ((flags & AMDGPU_FENCE_FLAG_INT) && adev->pdev->device != 0x50) { + if (flags & AMDGPU_FENCE_FLAG_INT) { /* generate an interrupt */ amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP)); amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0)); @@ -887,10 +885,6 @@ static int sdma_v5_0_start(struct amdgpu_device *adev) r = sdma_v5_0_load_microcode(adev); if (r) return r; - - /* The value of mmSDMA_F32_CNTL is invalid the moment after loading fw */ - if (amdgpu_emu_mode == 1 && adev->pdev->device == 0x4d) - msleep(1000); } /* unhalt the MEs */ |