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| author |   Charlene Liu <charlene.liu@amd.com> | 2019-05-07 15:12:02 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2019-06-22 09:34:10 -0500 |
| commit | 4850ce697f9892df083bd7b3ec7c715404dd4279 (patch) | |
| tree | c9022a6a03228f60403fd08c13a7d67dc8148356 /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | |
| parent | drm/amd/display: Fix ODM combine data format (diff) | |
| download | wireguard-linux-4850ce697f9892df083bd7b3ec7c715404dd4279.tar.xz wireguard-linux-4850ce697f9892df083bd7b3ec7c715404dd4279.zip | |
drm/amd/display: Add hubp_init entry to hubp vtable
Different HW will need to init HUBP differently. For now, add a vtable
entry, and hook a NO-OP for DCN1 and DCN2.
In addition, future HW will need to access the HUBPREQ_DEBUG and
CUR_TTU_CNTL0 register for hubp_init. Add that here.
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h index 9f56c1d2d188..f790ab9db6eb 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.h @@ -62,6 +62,7 @@ SRI(FLIP_PARAMETERS_0, HUBPREQ, id),\ SRI(FLIP_PARAMETERS_1, HUBPREQ, id),\ SRI(FLIP_PARAMETERS_2, HUBPREQ, id),\ + SRI(DCN_CUR1_TTU_CNTL0, HUBPREQ, id),\ SRI(DCN_CUR1_TTU_CNTL1, HUBPREQ, id),\ SRI(DCSURF_FLIP_CONTROL2, HUBPREQ, id), \ SRI(VMID_SETTINGS_0, HUBPREQ, id) @@ -146,6 +147,7 @@ uint32_t FLIP_PARAMETERS_0;\ uint32_t FLIP_PARAMETERS_1;\ uint32_t FLIP_PARAMETERS_2;\ + uint32_t DCN_CUR1_TTU_CNTL0;\ uint32_t DCN_CUR1_TTU_CNTL1;\ uint32_t VMID_SETTINGS_0;\ uint32_t FLIP_PARAMETERS_3;\ |