diff options
| author |   Alvin Lee <Alvin.Lee2@amd.com> | 2023-08-08 13:21:58 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-09-11 17:11:19 -0400 |
| commit | e87a6c5b7780b5f423797351eb586ed96cc6d151 (patch) | |
| tree | 7574eb68afa18f0b0361dace5091c44081a49b3a /drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | |
| parent | drm/amdkfd: Update CU masking for GFX 9.4.3 (diff) | |
| download | wireguard-linux-e87a6c5b7780b5f423797351eb586ed96cc6d151.tar.xz wireguard-linux-e87a6c5b7780b5f423797351eb586ed96cc6d151.zip | |
drm/amd/display: Blank phantom OTG before enabling
[Description]
Before enabling the phantom OTG for an update we
must enable DPG to avoid underflow.
Reviewed-by: Samson Tam <samson.tam@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c index ad82f19fe36a..5ac85df158b9 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c @@ -1840,8 +1840,16 @@ void dcn20_program_front_end_for_ctx( dc->current_state->res_ctx.pipe_ctx[i].stream->mall_stream_config.type == SUBVP_PHANTOM) { struct timing_generator *tg = dc->current_state->res_ctx.pipe_ctx[i].stream_res.tg; - if (tg->funcs->enable_crtc) + if (tg->funcs->enable_crtc) { + if (dc->hwss.blank_phantom) { + int main_pipe_width, main_pipe_height; + + main_pipe_width = dc->current_state->res_ctx.pipe_ctx[i].stream->mall_stream_config.paired_stream->dst.width; + main_pipe_height = dc->current_state->res_ctx.pipe_ctx[i].stream->mall_stream_config.paired_stream->dst.height; + dc->hwss.blank_phantom(dc, tg, main_pipe_width, main_pipe_height); + } tg->funcs->enable_crtc(tg); + } } } /* OTG blank before disabling all front ends */ |