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author | 2020-02-11 15:33:38 -0500 | |
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committer | 2020-03-05 00:29:05 -0500 | |
commit | c14b726ee0ca387931b9605405de9dddd4e76ee5 (patch) | |
tree | 09c7b18dfab118e886edec753c60559e5b39142c /drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h | |
parent | drm/amd/display: Add driver support for enabling PSR on DMCUB (diff) | |
download | wireguard-linux-c14b726ee0ca387931b9605405de9dddd4e76ee5.tar.xz wireguard-linux-c14b726ee0ca387931b9605405de9dddd4e76ee5.zip |
drm/amd/display: only include FEC overhead if both asic and display support FEC
[why]
Some asics don't support FEC but FEC overhead is added into link
bandwidth calculation by mistake. This causes certain timing cannot be
validated.
[how]
Only include FEC overhead if both asic and display support FEC.
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h index fb748f082c56..c2b392a533b1 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw/link_encoder.h @@ -68,6 +68,7 @@ struct encoder_feature_support { unsigned int max_hdmi_pixel_clock; bool hdmi_ycbcr420_supported; bool dp_ycbcr420_supported; + bool fec_supported; }; union dpcd_psr_configuration { |