diff options
| author |   Duncan Ma <duncan.ma@amd.com> | 2023-08-28 15:48:27 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-09-26 17:00:21 -0400 |
| commit | 1288d702080949f87688d49dfeeacc99f40adc9b (patch) | |
| tree | b2d894cd87eb9db0bb13bbb4fe1c6f45ac0e7771 /drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | |
| parent | drm/amd/display: remove guaranteed viewports limitation for odm (diff) | |
| download | wireguard-linux-1288d702080949f87688d49dfeeacc99f40adc9b.tar.xz wireguard-linux-1288d702080949f87688d49dfeeacc99f40adc9b.zip | |
drm/amd/display: Improve x86 and dmub ips handshake
[Why]
There is a race condition between x86 and dmcub fw when attempting to exit
IPS2. Scenarios including exiting IPS2 before IPS2 has been entered. This
can cause unexpected hang when DMCUB attempt to exit while PMFW still
tries to enter IPS2.
[How]
A new design has been introduced to remove race conditions and improve the
handshake between x86 and DMCUB. An AON scratch register is borrowed from
PMFW to determine whether DMCUB has committed to IPS entry or not.
In the case when dmcub has committed IPS entry, x86 must poll until an exit
event occurred either from DMCUB(IPS1) or PMFW(IPS2). x86 will wait
upperbound of evaluation and IPS entry time to ensure IPS2 exit event has
been sent to PMFW.
Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Duncan Ma <duncan.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h index e0dd56182841..d4d59a916668 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h @@ -422,7 +422,8 @@ struct hw_sequencer_funcs { struct pg_block_update *update_state, bool power_on); void (*root_clock_control)(struct dc *dc, struct pg_block_update *update_state, bool power_on); - + void (*set_idle_state)(const struct dc *dc, bool allow_idle); + uint32_t (*get_idle_state)(const struct dc *dc); void (*commit_subvp_config)(struct dc *dc, struct dc_state *context); void (*enable_phantom_streams)(struct dc *dc, struct dc_state *context); void (*subvp_pipe_control_lock)(struct dc *dc, |