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author | Joshua Aberback <joshua.aberback@amd.com> | 2020-04-29 19:01:14 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2020-10-05 15:16:30 -0400 |
commit | 3e19095534caec6be8f8c1a7d8fd4879e23637ed (patch) | |
tree | e586f46680328f59140ead02872b3f8d9a75fce8 /drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | |
parent | drm/amd/display: Fixed comments (uniform style) (diff) | |
download | wireguard-linux-3e19095534caec6be8f8c1a7d8fd4879e23637ed.tar.xz wireguard-linux-3e19095534caec6be8f8c1a7d8fd4879e23637ed.zip |
drm/amd/display: Force enable pstate on driver unload
[Why]
During driver unload, it is expected that p-state switching is supported.
If it's not supported, PMFW will hang due to a forced p-state switch. Even
if the current timing does not support p-state normally, we still want to
force allow because the worst that can happen is underflow. This will
match Navi10 behaviour.
[How]
- new hubbub func to control the force pstate register
- force allow when releasing display ownership
- registers are inaccessible after due to m_cgs.hwNotAvailable
- explicitly disable force signal during hw_init
- if driver is disabled and re-enabled, register not cleared otherwise
Also, remove DCN3 part of dcn10_init_hw, we will not be going back to it.
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Eryk Brol <eryk.brol@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h')
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h index f48ee24d42f9..55c642950e91 100644 --- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h +++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h @@ -50,6 +50,9 @@ struct dpp; struct dce_hwseq; struct hw_sequencer_funcs { +#ifdef CONFIG_DRM_AMD_DC_DCN3_0 + void (*hardware_release)(struct dc *dc); +#endif /* Embedded Display Related */ void (*edp_power_control)(struct dc_link *link, bool enable); void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up); |