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authorWenjing Liu <Wenjing.Liu@amd.com>2020-02-24 17:22:36 -0500
committerAlex Deucher <alexander.deucher@amd.com>2020-03-09 13:49:06 -0400
commitb6a1a0e76084c541382050606830580740ef9e84 (patch)
tree193b6c4e2cdc4883476158d02fddc6df7c1eff9d /drivers/gpu/drm/amd/display/dc
parentdrm/amd/display: Add stay count and bstatus to HDCP log (diff)
downloadwireguard-linux-b6a1a0e76084c541382050606830580740ef9e84.tar.xz
wireguard-linux-b6a1a0e76084c541382050606830580740ef9e84.zip
drm/amd/display: determine is mst hdcp based on stream instead of sink signal
[why] It is possible even if sink signal is MST but driver enables SST stream. We should not determine if we should do MST authentication based on sink's capability. Instead we should determine whether to do MST authentication based on what we have enabled in stream. Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dc')
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link.c2
-rw-r--r--drivers/gpu/drm/amd/display/dc/dm_cp_psp.h1
2 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index a4680968c8f4..ddd4dca61cc3 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -2959,6 +2959,8 @@ static void update_psp_stream_config(struct pipe_ctx *pipe_ctx, bool dpms_off)
config.link_enc_inst = pipe_ctx->stream->link->link_enc_hw_inst;
config.dpms_off = dpms_off;
config.dm_stream_ctx = pipe_ctx->stream->dm_stream_context;
+ config.mst_supported = (pipe_ctx->stream->signal ==
+ SIGNAL_TYPE_DISPLAY_PORT_MST);
cp_psp->funcs.update_stream_config(cp_psp->handle, &config);
}
}
diff --git a/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h b/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
index 626d22d437f4..968c46dfb506 100644
--- a/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
+++ b/drivers/gpu/drm/amd/display/dc/dm_cp_psp.h
@@ -32,6 +32,7 @@ struct cp_psp_stream_config {
uint8_t otg_inst;
uint8_t link_enc_inst;
uint8_t stream_enc_inst;
+ uint8_t mst_supported;
void *dm_stream_ctx;
bool dpms_off;
};