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author | 2019-11-07 15:47:46 -0500 | |
---|---|---|
committer | 2019-12-05 16:28:23 -0500 | |
commit | c1825b5777ce25b0f84be8775a588d2bfa1e6420 (patch) | |
tree | 10d5521f974ccf7db921030e879422690864218a /drivers/gpu/drm/amd/display/dmub/src | |
parent | drm/amd/display: Return DMUB_STATUS_OK when autoload unsupported (diff) | |
download | wireguard-linux-c1825b5777ce25b0f84be8775a588d2bfa1e6420.tar.xz wireguard-linux-c1825b5777ce25b0f84be8775a588d2bfa1e6420.zip |
drm/amd/display: Program CW5 for tracebuffer for dcn20
[Why]
On dcn21 this is programmed for tracebuffer support but isn't being
programmed on dcn20.
DMCUB execution hits an undefined address 65000000 on tracebuffer
access.
[How]
Program CW5.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/dmub/src')
-rw-r--r-- | drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c index 6b7d54572aa3..302dd3d4b77d 100644 --- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c +++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn20.c @@ -99,6 +99,13 @@ void dmub_dcn20_setup_windows(struct dmub_srv *dmub, REG_SET_2(DMCUB_REGION4_TOP_ADDRESS, 0, DMCUB_REGION4_TOP_ADDRESS, cw4->region.top - cw4->region.base - 1, DMCUB_REGION4_ENABLE, 1); + + REG_WRITE(DMCUB_REGION3_CW5_OFFSET, cw5->offset.u.low_part); + REG_WRITE(DMCUB_REGION3_CW5_OFFSET_HIGH, cw5->offset.u.high_part); + REG_WRITE(DMCUB_REGION3_CW5_BASE_ADDRESS, cw5->region.base); + REG_SET_2(DMCUB_REGION3_CW5_TOP_ADDRESS, 0, + DMCUB_REGION3_CW5_TOP_ADDRESS, cw5->region.top, + DMCUB_REGION3_CW5_ENABLE, 1); } void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, |