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| author |   Samson Tam <Samson.Tam@amd.com> | 2020-02-04 14:26:30 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-02-25 11:03:39 -0500 |
| commit | 586ec5dc5c8ea28f46b9e27415dfd0f4de01849e (patch) | |
| tree | b275bee74fb50b5c438dcf1760ad868a3fd3625f /drivers/gpu/drm/amd/display/modules/freesync | |
| parent | drm/amd/display: Add dmcu f/w loading for NV12 (diff) | |
| download | wireguard-linux-586ec5dc5c8ea28f46b9e27415dfd0f4de01849e.tar.xz wireguard-linux-586ec5dc5c8ea28f46b9e27415dfd0f4de01849e.zip | |
drm/amd/display: do not force UCLK DPM to stay at highest state during display off in DCN2
[Why]
Add optimization to allow pstate change support when all displays
are off in DCN2.
[How]
Add clk_mgr_helper_get_active_plane_cnt() to sum plane_count for all
valid stream_status[]. If plane_count is 0, then there are no active
or virtual streams present. Use plane_count == 0 as extra condition to
enable p_state_change_support in dcn2_update_clocks().
Signed-off-by: Samson Tam <Samson.Tam@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/modules/freesync')
0 files changed, 0 insertions, 0 deletions