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| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-10-06 23:49:33 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-11-03 19:46:03 +0200 |
| commit | 88a24415220990d41834838d54ba028399649ec9 (patch) | |
| tree | 21bf5dbfdb45d9b148c03a5b604dd716b84efe66 /drivers/gpu/drm/i915/display/intel_atomic_plane.c | |
| parent | drm/i915: Query the vswing levels per-lane for snps phy (diff) | |
| download | wireguard-linux-88a24415220990d41834838d54ba028399649ec9.tar.xz wireguard-linux-88a24415220990d41834838d54ba028399649ec9.zip | |
drm/i915: Enable per-lane drive settings for icl+
Now that the link buf_trans, link training, and the
combo/mg/dkl/snps phy programming are all fixed up we can
allow per-lane DP drive settings on icl+. Make it so.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211006204937.30774-13-ville.syrjala@linux.intel.com
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_atomic_plane.c')
0 files changed, 0 insertions, 0 deletions