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| author |   Matt Roper <matthew.d.roper@intel.com> | 2020-06-05 19:57:36 -0700 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2020-06-09 10:25:33 -0700 |
| commit | 2cf122070c5681ea78d384c4e86a7d80f16bd1b7 (patch) | |
| tree | 93075b679461c6e86d68ee0e469ee3ec9406b6b1 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/rkl: RKL uses ABOX0 for pixel transfers (diff) | |
| download | wireguard-linux-2cf122070c5681ea78d384c4e86a7d80f16bd1b7.tar.xz wireguard-linux-2cf122070c5681ea78d384c4e86a7d80f16bd1b7.zip | |
drm/i915/rkl: Update TGP's pin mapping when paired with RKL
HPD pin handling for RKL+TGP is a special case; we effectively select
the HPD pin based on the DDI (A,B,D,E) rather than the PHY (A,B,C,D).
This differs from the regular behavior of RKL+CMP (and also TGL+TGP).
v2:
- Rather than providing a custom hpd_pin mapping table, just assign
encoder->hpd_pin in a custom manner for this setup. (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200606025740.3308880-4-matthew.d.roper@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions