diff options
| author |   Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-23 16:43:52 -0700 |
|---|---|---|
| committer | Lucas De Marchi <lucas.demarchi@intel.com> | 2021-07-24 21:49:55 -0700 |
| commit | 4fd177288a4ee046bd8590355a64de855dcf77e2 (patch) | |
| tree | ec96fc697e41af92f58aebc53b1da736b8e7dfaa /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915: Program chicken bit during DP MST sequence on TGL+ (diff) | |
| download | wireguard-linux-4fd177288a4ee046bd8590355a64de855dcf77e2.tar.xz wireguard-linux-4fd177288a4ee046bd8590355a64de855dcf77e2.zip | |
drm/i915: fix not reading DSC disable fuse in GLK
We were using GRAPHICS_VER() to handle SKL_DFSM register, which means we
were not handling GLK correctly since that has GRAPHICS_VER == 9, but
DISPLAY_VER == 10. Switch the entire branch to check DISPLAY_VER
which makes it more in line with Bspec.
Even though the Bspec has an exception for RKL in
TGL_DFSM_PIPE_D_DISABLE, we don't have to do anything as the bit has
disable semantic and RKL doesn't have pipe D.
Bspec: 50075, 7548
Fixes: 2b5a4562edd0 ("drm/i915/display: Simplify GLK display version tests")
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210723234352.214459-1-lucas.demarchi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions