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author | 2020-07-09 20:01:11 +0100 | |
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committer | 2020-07-09 20:40:49 +0100 | |
commit | b297bde16c0fb0052e53aa0cfc2ea8ca6ef210aa (patch) | |
tree | 74774101e51aa9d5273c60a44304d7364767913a /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
parent | drm/i915/bios: Parse HOBL parameter (diff) | |
download | wireguard-linux-b297bde16c0fb0052e53aa0cfc2ea8ca6ef210aa.tar.xz wireguard-linux-b297bde16c0fb0052e53aa0cfc2ea8ca6ef210aa.zip |
drm/i915/gt: Optimise aliasing-ppgtt allocations
Since the aliasing-ppgtt remains the default for gen6/gen7, it is worth
optimising the ppgtt allocation for it. In this case, we do not need to
flush the GGTT page directories entries as they are fixed during setup.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200709190111.5492-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions