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| author |   Dave Airlie <airlied@redhat.com> | 2021-02-04 12:57:18 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2021-02-04 12:57:28 +1000 |
| commit | ce7c3bded64abbaabb1146803d0ce09694dc95e0 (patch) | |
| tree | ce73ca923f17d16bdae736fd445c309936e9d123 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | Merge tag 'drm/tegra/for-5.12-rc1' of ssh://git.freedesktop.org/git/tegra/linux into drm-next (diff) | |
| parent | drm/i915/dp: Prevent setting the LTTPR LT mode if no LTTPRs are detected (diff) | |
| download | wireguard-linux-ce7c3bded64abbaabb1146803d0ce09694dc95e0.tar.xz wireguard-linux-ce7c3bded64abbaabb1146803d0ce09694dc95e0.zip | |
Merge tag 'drm-intel-next-2021-01-29' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- WARN if plane src coords are too big (Ville)
- Prevent double YUV range correction on HDR planes (Andres)
- DP MST related Fixes (Sean, Imre)
- More clean-up around DRAM detection code (Jose)
- Actually async flips enable for all ilk+ platforms (Ville)
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210129225328.GA1041349@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp_mst.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index d6a1b961a0e8..b4621ed0127e 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -68,7 +68,9 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder, slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr, connector->port, - crtc_state->pbn, 0); + crtc_state->pbn, + drm_dp_get_vc_payload_bw(crtc_state->port_clock, + crtc_state->lane_count)); if (slots == -EDEADLK) return slots; if (slots >= 0) |