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| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-06-05 13:23:25 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-06-05 17:18:04 +0100 |
| commit | fdd4f9416511d7a1f0a84a75052a3476dd163438 (patch) | |
| tree | 78ba78e823757f961ce0ad619f515b00950077b9 /drivers/gpu/drm/i915/display/intel_dp_mst.c | |
| parent | drm/i915/gt: Include the engine's fw-domains in the debug info (diff) | |
| download | wireguard-linux-fdd4f9416511d7a1f0a84a75052a3476dd163438.tar.xz wireguard-linux-fdd4f9416511d7a1f0a84a75052a3476dd163438.zip | |
drm/i915/gt: Set timeslicing priority from queue
If we only submit the first port, leaving the second empty yet have
ready requests pending in the queue, use that to set the timeslicing
priority (i.e. the priority at which we will decided to enabling
timeslicing and evict the currently active context if the queue is of
equal priority after its quantum expired).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200605122334.2798-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
0 files changed, 0 insertions, 0 deletions