diff options
| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-01-27 23:15:37 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-01-28 12:35:26 +0000 |
| commit | ff3d4ff6c9e66ba1602d0b89255961ddd43e7db7 (patch) | |
| tree | 5b7cd59495f37726672884432dc63eb10557127d /drivers/gpu/drm/i915/gt/intel_gt_irq.c | |
| parent | drm/i915/gt: Reorganise gen8+ interrupt handler (diff) | |
| download | wireguard-linux-ff3d4ff6c9e66ba1602d0b89255961ddd43e7db7.tar.xz wireguard-linux-ff3d4ff6c9e66ba1602d0b89255961ddd43e7db7.zip | |
drm/i915/gt: Tidy repetition in declaring gen8+ interrupts
We use the same interrupt mask for each engine, so define it once in a
local and reuse.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200127231540.3302516-3-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_gt_irq.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_gt_irq.c | 22 |
1 files changed, 6 insertions, 16 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c index 71873a4cafc0..7278b10e1a03 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c @@ -344,25 +344,15 @@ void gen8_gt_irq_reset(struct intel_gt *gt) void gen8_gt_irq_postinstall(struct intel_gt *gt) { - struct intel_uncore *uncore = gt->uncore; - /* These are interrupts we'll toggle with the ring mask register */ - u32 gt_interrupts[] = { - (GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_RCS_IRQ_SHIFT | - GT_RENDER_USER_INTERRUPT << GEN8_BCS_IRQ_SHIFT | - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_BCS_IRQ_SHIFT), - - (GT_RENDER_USER_INTERRUPT << GEN8_VCS0_IRQ_SHIFT | - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS0_IRQ_SHIFT | - GT_RENDER_USER_INTERRUPT << GEN8_VCS1_IRQ_SHIFT | - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VCS1_IRQ_SHIFT), - + const u32 irqs = GT_RENDER_USER_INTERRUPT | GT_CONTEXT_SWITCH_INTERRUPT; + const u32 gt_interrupts[] = { + irqs << GEN8_RCS_IRQ_SHIFT | irqs << GEN8_BCS_IRQ_SHIFT, + irqs << GEN8_VCS0_IRQ_SHIFT | irqs << GEN8_VCS1_IRQ_SHIFT, 0, - - (GT_RENDER_USER_INTERRUPT << GEN8_VECS_IRQ_SHIFT | - GT_CONTEXT_SWITCH_INTERRUPT << GEN8_VECS_IRQ_SHIFT) + irqs << GEN8_VECS_IRQ_SHIFT, }; + struct intel_uncore *uncore = gt->uncore; gt->pm_ier = 0x0; gt->pm_imr = ~gt->pm_ier; |