diff options
| author |   Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-06 07:16:12 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2020-03-06 10:53:54 +0000 |
| commit | 1eaa251b66a6dfb53cc647fbd79e3b8512ccf8f3 (patch) | |
| tree | 4ad76d7c3ca7ae35b921b848321736f5adb7732e /drivers/gpu/drm/i915/gt/intel_lrc.c | |
| parent | drm/i915: be more solid in checking the alignment (diff) | |
| download | wireguard-linux-1eaa251b66a6dfb53cc647fbd79e3b8512ccf8f3.tar.xz wireguard-linux-1eaa251b66a6dfb53cc647fbd79e3b8512ccf8f3.zip | |
drm/i915: Assert requests within a context are submitted in order
Check the flow of requests into the hardware to verify that are
submitted in order along their timeline.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200306071614.2846708-1-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/gt/intel_lrc.c')
| -rw-r--r-- | drivers/gpu/drm/i915/gt/intel_lrc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c index 16a023ac4604..13941d1c0a4a 100644 --- a/drivers/gpu/drm/i915/gt/intel_lrc.c +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c @@ -1622,6 +1622,7 @@ static bool can_merge_rq(const struct i915_request *prev, if (!can_merge_ctx(prev->context, next->context)) return false; + GEM_BUG_ON(i915_seqno_passed(prev->fence.seqno, next->fence.seqno)); return true; } @@ -2142,6 +2143,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine) GEM_BUG_ON(last && !can_merge_ctx(last->context, rq->context)); + GEM_BUG_ON(last && + i915_seqno_passed(last->fence.seqno, + rq->fence.seqno)); submit = true; last = rq; |